The ever-rising desire to maintain Moore’s law of exponential growth is driving the semiconductor industry to continuously shrink the sizes of integrated circuit components. A series of breakthroughs in process technologies, especially in photolithography, have fueled this trend. Now, chips are packed with a billion transistors compared to thousands in the 1970s.
For further miniaturization of feature sizes, chipmakers use two key add-on technologies – immersion lithography combined with multiple patterning. The idea is to use multiple photomasks and expose the photoresist multiple times to resolve fine features.
Semiconductor companies have shrunk feature sizes to as small as 42 nm using 193-nm lithographic systems, but that comes at a price, namely complex manufacturing and increasing the costs of chips.
There’s a better way: extreme ultraviolet lithography (EUVL).
The Great Promise of EUVL
One powerful way to dramatically improve the resolution is to shorten the wavelength of light. EUVL using a wavelength of 13.5 nm has emerged as a leading candidate among the next generation lithography technologies to continue the Moore’s law scaling of devices. EUVL can produce fine features with pitches smaller than 32 nm without resorting to multiple patterning. This promises to produce better chip yields; it’s more cost-effective than multiple patterning.
Overcoming the Challenges
EUVL is also an extremely complex technology. The challenges start with the generation of extreme ultraviolet (EUV) light itself. Other challenges include the development of new chemicals, new mask infrastructure and step-and-scan systems to produce semiconductors.
There has been steady progress on tackling these challenges in the recent years. Dutch company ASML, one of the leaders and major driving forces for EUV lithography, has unveiled the NXE:3400B scanner recently at the SPIE Advanced Lithography Conference 2017. The system is rated to produce 125 wafers per hour, which is the target for use in volume-production fabs. The scanner is a successor of the ASML’s TWINSCAN NXE platforms NXE:330B and NXE:3350B, 14 of which are installed in the field.
EUV Lithography for High Volume Manufacturing
While the first NXE:3400B was shipped to a customer in March of this year, the industry is already using data from the installed systems to learn about the readiness of EUVL for high volume manufacturing (HVM). At the same SPIE Advanced Lithography Conference 2017 conference, imec detailed a solution for HVM using a “hybrid” system of EUVL and the current 193-nm immersion-based scanners. The researchers patterned the critical back-end-of-line (BEOL) metal layers with pitches as small as 32 nm. The immersion-based self-aligned quadruple patterning (SAQP) of metal lines was combined with a single step EUVL print of the block layer. ASML’s NXE:3300 scanner was used for the purpose.
The proposed “hybrid” solution with single step EUVL block print is expected to ensure a 20 percent cost reduction with respect to the total immersion based multiple block patterning. The encouraging results of this study certainly lights the path ahead for EUVL adoption for high volume manufacturing.
One of the Biggest Transitions by the Semiconductor Industry
Using traditional techniques, chipmakers are struggling to shrink the sizes of devices, while keeping costs effective. In order to save Moore’s law from grinding to a halt, chipmakers have widely accepted that EUV lithography adoption is 100 percent critical and will be one of the biggest transitions undertaken by the semiconductor industry. Consumers can optimistically look forward to faster and slimmer computers, tablets, and other smart devices in the near future.
Image courtesy of ASML.
