Next-gen semiconductors: The 7-year roadmap to integrating 2D materials

Next-gen semiconductors: The 7-year roadmap to integrating 2D materials

By Jorge Hurtado

In the last decade, transition metal dichalcogenides (TMDs) and graphene have emerged as some of the most relevant elements of 2D materials in overcoming the limitations of silicon-based technologies. TMDs and graphene offer innovative transistor design and functionality approaches. They enable atomic-thin channel transistors and monolithic 3D integration, signaling a new era in information technology.

Large companies like TSMC, Intel, and the Interuniversity Microelectronics Centre, IMEC, invest heavily in 2D material research and integration. This signals a transition from laboratory to industrial-scale applications. Unarguably, 2D materials are here to drive future innovations in device performance and system enhancements. 

The transition of 2D materials from research to industrial applications presents various challenges. Leading Chinese scholars recently developed a roadmap for information technology based on 2D materials. Here, we provide their perspective mixed with PreScouter insights on the current advancements and potential future trends in the industrial application of 2D materials.

What is a 2D material?

2D materials are extremely thin, often just one or a few atoms thick. They exhibit high electrical conductivity and exceptional mechanical strength. Additionally, 2D materials are highly flexible and optically transparent. These materials possess excellent thermal conductivity and semiconducting properties, with the added benefit of tunable bandgaps. Their chemical stability ensures reliability and durability in various applications. 

These properties make 2D materials very promising for creating the next generation of tiny, advanced electronic and light-based devices. TMDs and borophene are some examples of 2D materials.

How do 2D materials relate to Moore’s Law?

Transition metal dichalcogenides are only a few atoms thick and have excellent physical properties. These materials are critical in pushing the boundaries of Moore’s Law beyond silicon.

Moore’s Law predicts that the number of transistors on a chip will double approximately every two years. This has driven the rapid growth and miniaturization of electronics. However, silicon is reaching its physical limits regarding how tiny and efficient transistors can be made.

TMDs offer a solution to this problem. Their ultra-thin structure allows for the creation of even smaller and more efficient electronic devices. By using TMDs, researchers and engineers can continue to shrink transistor sizes. This allows packing more transistors into a single chip, thereby extending the progress predicted by Moore’s Law. 

These properties make TMDs critical for developing the next generation of advanced electronics that are faster, more powerful, and more efficient.

How are 2D materials made?

Various methods exist for preparing 2D materials. Chemical vapor deposition (CVD) and metal-organic chemical vapor deposition (MOCVD) are prominent methods for producing high-quality, wafer-scale 2D materials. These methods allow the controlled growth of 2D materials with desirable properties. Such control is essential for their integration into electronic and optoelectronic devices.

While current processes are well-defined, industrial-scale production demands new equipment and innovative designs to advance the field.

Roadmap for industrial application of 2D materials:

Technology roadmap journey for development of 2D materials

Roadmap for the 2D information materials development (Source)

This section outlines the essential steps for scaling up the industrial application of 2D materials. Here, we present strategies for enhancing precision and increasing production capacity.

     1. Scaling up with precision 

The technology roadmap highlights the need to scale up the production of 2D materials with high precision. This includes the development of larger single-crystal wafers, such as the progress made with 2-inch n-type single-crystal wafers. 

However, controlling material defects and matching silicon’s performance with p/n-type materials are critical challenges. Future advancements aim to achieve larger single crystals with precise defect control. 

Recent advancements in epitaxial growth techniques have enabled the fabrication of 12-inch polycrystalline materials. Previously, the state-of-the-art primarily involved the production of smaller wafer sizes with less uniformity and consistency in single-crystal quality. Two independent studies have shown that metal-organic chemical vapor deposition can grow 12-inch, single-crystal MoS2 monolayers. This process uses a quartz nozzle-guided precursor delivery approach. Additionally, a modularized growth strategy was developed for the batch production of wafer-scale transition metal dichalcogenides. This process allowed for the fabrication of 2-inch wafers, producing up to 15 pieces per batch. It also achieved a record size of 12-inch wafers with a production capacity of 3 pieces per batch.

Previously, the production capacity and wafer sizes were considerably smaller, with lower throughput and higher defect rates. These advancements increase the scale and quality of the wafers produced, enhancing the production efficiency. This paves the way for more widespread and practical applications of 2D materials in advanced electronic and photonic devices.

These developments are crucial for integrated circuit applications, requiring materials with low defect densities and high uniformity. Efforts are being directed towards achieving single-crystal wafers for p-type and n-type materials with in-plane defect densities reduced to 1010 cm-2. This focus on precision scaling is pivotal for enhancing the performance and reliability of 2D material-based devices.

Current challenges:
  • Controlling material defects.
  • Achieving uniformity in large-scale production.
  • Mismatch in performance between silicon and 2D materials for p/n-type applications.
Addressing the challenges:
  • Advanced epitaxial growth techniques and innovative manufacturing processes are needed.
  • Precision scaling and defect control technologies must be further developed.
  • Collaborative research efforts and industry-standard compliance will be crucial.
Current status and TRL: 

The technology is at TRL 4-5, where basic functionalities have been shown in the lab and controlled environments. Significant progress is expected within the next 2-3 years, moving towards higher TRLs as precision and scalability improve​.

     2. Characterization enhanced by AI 

Characterization techniques for 2D materials have reached sub-atomic resolution levels. These include advancements like aberration-corrected high-resolution transmission electron microscopy and scanning transmission electron microscopy, including ptychography STEM. This altogether enhances the visualization of atomic positions and defects.

Integrating AI tools into these processes is essential for developing standardized and refined assessment criteria. AI improves the accuracy and efficiency of analyzing experimental metadata. It makes material characterization more reliable and streamlined. 

Additionally, AI facilitates in-situ and in-line characterization during manufacturing. This enables real-time assessments that quickly identify defects and enhance yield and technological workflows. 

AI-driven quality assessment techniques are particularly crucial as wafer-scale chips based on 2D materials emerge as competitors to silicon technology. These technologies ensure rapid, automated, and non-invasive inspection of devices. They maintain quality standards and explore operational limits and failure mechanisms.

Current challenges: 
  • Developing standardized and refined assessment criteria for 2D materials characterization. 
  • Absence of sophisticated algorithms and large datasets for AI training.
Addressing the challenges: 
  • Built up comprehensive datasets and improved machine learning models. 
  • Collaboration between AI researchers and material scientists.
Current status and TRL

The technology is at TRL 3-4, where proof-of-concept has been established and initial integrations are tested. Significant advancements in AI integration are expected in the next 3-5 years​​.

     3. Electronic devices: Synergy of back-end-of-line and front-end-of-line

2D semiconductor devices are advancing towards performance metrics that rival silicon-based devices. The focus is foundational technologies such as high-k/metal gate integration and controllable doping. Enhancements in performance, power consumption, and area optimization are key goals. Combining back-end-of-line (BEOL) and front-end-of-line (FEOL) processes will drive these improvements.

But why does integrating 2D semiconductors in both BEOL and FEOL processes matter? Incorporating 2D materials into power gating devices at the chip’s backside can enhance performance without requiring extreme ultraviolet lithography. Advances in ohmic contact technology and doping control are critical for high-performance devices. These devices can be integrated into mature silicon nodes for lower power consumption. This approach will be instrumental in meeting the demands of advanced technology nodes, such as sub-1 nm nodes.

Current challenges: 
  • Achieving reliable doping control.
  • Integrating high-k/metal gates.
  • Ensuring compatibility between BEOL and FEOL processes.
Addressing the challenges: 
  • Refining doping techniques.
  • Developing new materials for high-k/metal gates.
  • Enhancing process integration. 
Current status and TRL: 

The technology is at TRL 4-5, with essential components demonstrated and some integration achieved. Full-scale functional integration is expected within the next 3-5 years.

     4. Thermal management and interconnects

Effective thermal management and the reduction of resistance-capacitance delays are crucial. Utilizing materials with lower dielectric constants and integrating 2D materials like hexagonal boron nitride and graphene will enhance device performance and reliability. These materials are expected to improve thermal management and minimize delays in semiconductor devices.

The potential of multi-crystalline and amorphous BN (a-BN) as thermal management solutions is significant. These materials could reduce operating temperatures and contribute to device performance and durability.

For instance, h-BN can act as a thermal scattering bonding layer. It reduces operating temperatures and enhances device performance. Graphene has an exceptional electrical conductivity and ability to suppress surface scattering effects. This makes it a promising material for reducing interconnect resistance and improving the longevity of semiconductor devices. These innovations are critical for maintaining device performance as dimensions shrink and operational demands increase.

Current challenges:
  • Integrating h-BN and graphene into existing semiconductor processes.
  • Ensuring the stability and reliability of integrated materials under operational conditions.
Addressing the challenges: 
  • More research is needed to develop methods for integrating h-BN and graphene into semiconductor processes.
  • Extensive testing is required to ensure long-term stability and performance.
Current status and TRL: 

The technology is at TRL 3-4, with experimental validations in lab settings. Higher TRLs are anticipated to be reached in the next 3-4 years as integration methods improve and reliability is established.

     5. Integrated circuits and 3D integration

The future of integrated circuits based on 2D semiconductors involves moving towards 3D integration. This approach uses the advantages of 2D semiconductors for monolithic 3D heterogeneous integration. It enhances chip-level energy efficiency and functionality. This transition will enable more compact and efficient 3D integrated circuits.

Advancements in 3D integration focus on using the back-end-of-line (BEOL) integration of 2D semiconductors with silicon-based CMOS circuits. This strategy is expected to enhance chip-level energy efficiency and expand the functionality of silicon-based chips. For example, 2D semiconductor-based memory and sensors integrated with CMOS circuits can enhance overall chip performance. This makes it a crucial path for developing high-performance, energy-efficient integrated circuits.​

Current challenges:
  • Developing reliable processes for stacking 2D materials.
  • Ensuring efficient thermal management in 3D structures.
Addressing the challenges:
  • More innovations in bonding techniques, thermal management solutions, and process integration. 
  • Research into new materials and methods for efficient heat dissipation will be crucial.
Current status and TRL: 

The technology is at TRL 3-4, with initial demonstrations of 3D integration. Advances in stacking and thermal management are expected to push this to TRL 5-6 in the next 4-5 years

     6. Optoelectronic Integration

Optoelectronic integration is poised to become a pivotal direction in high-throughput information technologies. Advancements in synthesizing large-scale, high-quality single crystals and developing multifunctional integrated devices are essential. This integration will pave the way for more efficient optoelectronic technologies supporting various applications.

Ongoing efforts emphasize the synthesis of large-area single crystals. They also focus on developing high-performance and multifunctional optoelectronic devices based on these single-crystal materials.

For instance, achieving high light emission efficiency and expanding the operational wavelength range of optoelectronic devices are critical milestones. These advancements will support applications in optical communication systems, imaging techniques, and quantum information processing. Ultimately, this broadens the range of applications and improves the overall performance of optoelectronic technologies.

Current challenges: 
  • Achieving high-quality, large-scale single crystals 
  • Developing multifunctional integrated devices with consistent performance
Addressing the challenges: 
  • Advanced synthesis techniques for large-area single crystals
  • Improving device fabrication processes. 
Current Status and TRL:

The technology is at TRL 3-4, with significant progress in lab-scale synthesis and device development. As synthesis and integration techniques mature, it is expected to advance to TRL 5-6 in the next 3-4 years​.

When will 2D materials make sense for the industry?

2D materials are crucial for the future of information technology. The unique properties of these materials enable breakthroughs in device performance and system integration. For industries, staying informed about these advancements is vital to maintaining a competitive edge.

2D materials are already being used commercially. For instance, graphene is used in heat spreader films for heating and thermal management and is used in smartphones. These films are produced by companies like Sixth Element and are known for their excellent thermal conductivity, which remains stable even at large thickness levels.

The company Grapheal develops wearable and disposable biosensors using graphene, enabling continuous monitoring and in-field diagnosis. Graphene’s properties allow for sensitive and fast detection of biological signals. This is crucial for wearable health monitoring devices and in-field diagnostic tools. 

Varta Micro Innovation and the Graphene Flagship project have shown that adding a small amount of graphene to silicon-based lithium-ion batteries can significantly enhance their performance. Graphene offers a conductive and stable matrix that mitigates the significant volume expansion of silicon during charge and discharge cycles. This development results in batteries with 30% greater capacity than current alternatives. It also helps batteries to maintain performance across more than 300 charge-discharge cycles.

In the short term (1-3 years), research and development will likely continue. Early adopters in semiconductor and optoelectronic industries will start implementing 2D materials in niche applications.

There will be a broader adoption in the medium term (3-7 years) as manufacturing techniques improve and costs decrease. More industries, such as energy storage and flexible electronics, will incorporate 2D materials into their products.

However, the industry may well gradually look into the long-term (>7 years), where the use of 2D materials becomes a standard component in many high-performance and next-generation devices. This period will likely see the full realization of 2D materials’ potential, driving significant advancements in technology and industry.

How can PreScouter help?

PreScouter can assist industry leaders in keeping up with recent technologies emerging from academia. PreScouter ensures companies can utilize 2D materials for future growth and success by providing tailored insights, technology scouting, and innovation strategy support.

If you have any questions or would like to know if we can help your business with its innovation challenges, please contact us here or email us at

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